This invention relates to avionics communication apparatus, and more particularly to logic and control circuitry for regulating division ratios in phase locked loops.
In a patent application by Boyd M. McClaskey and John F. Smith entitled "Improved Digital Synthesizer", filed concurrently herewith and assigned to the assignee hereof, Ser. No. 543,538, there is described a variable division rate phase locked loop useful for communication selection. In accordance with the scheme set forth therein, an output pulse signal from a voltage controlled oscillator is alternately divided by first or second factors prior to phase/frequency comparison, in response to the fractional MHz designation of the communication channel to be utilized.
In another patent application of Boyd M. McClaskey and John F. Smith filed concurrently herewith and assigned to the assignee hereof, entitled "Digital Synthesizer with Improved Coding Arrangement", Ser. No. 543,540, there is described an advantageous binary coding scheme for the decimal representation of the respective channels, for use in conjunction with the dual mode phase locking apparatus of the foregoing concurrently filed application.